Obviously I haven’t been updating this in a while, so this is a brief placeholder as of now.
Xilinx Radio Frequency System-on-Chip (RFSoC) carrier board in a custom 16-slot crate based on CompactPCI-Serial, for the PUEO experiment.
High Energy Light Isotope Explorer master trigger, a custom Xilinx Artix-7 design.
RAdio DIgitizer and Auxiliary Neutrino Trigger (RADIANT, and yes that took effort), a 24-channel GSa/s digitzer for the Radio Neutrino Observatory using custom ASICs (the LAB4D referenced below), SAMD21 microcontroller, Artix-7, and 2 auxiliary Lattice FPGAs to reduce pin count.
I’m currently involved in hardware/firmware/software design with a few projects:
http://helix.uchicago.edu/ : the High Energy Light Isotope Explorer
https://www.phys.hawaii.edu/~anita/new/index.html The Antarctic Impulsive Transient Antenna
http://ara.wipac.wisc.edu/home the Askaryan Radio Array
And I’m also working on designs for next-generation neutrino experiments, such as the Radio Neutrino Observatory (RNO) and PUEO, the successor to ANITA.
Recent publications:
Dynamic tunable notch filters for the Antarctic Impulsive Transient Antenna (ANITA) https://arxiv.org/abs/1709.04536
On ANITA’s sensitivity to long-lived, charged massive particles https://arxiv.org/abs/1807.08892
LAB4D: A Low Power, Multi-GSa/s, Transient Digitizer with Sampling Timebase Trimming Capabilities https://arxiv.org/abs/1803.04600